Sync caches only on split cache machines (dynamic test instead of compile ifdef)
authordjm@kirby.fc.hp.com <djm@kirby.fc.hp.com>
Wed, 28 Dec 2005 21:07:30 +0000 (15:07 -0600)
committerdjm@kirby.fc.hp.com <djm@kirby.fc.hp.com>
Wed, 28 Dec 2005 21:07:30 +0000 (15:07 -0600)
Signed-off-by: Dan Magenheimer <dan.magenheimer@hp.com>
xen/arch/ia64/xen/domain.c
xen/arch/ia64/xen/xenmisc.c

index a1fc49d7bd85f151f0ad4a4413db8f814640175c..5f4827ec2dc85b3061641f2ebb09f018d3b84fd4 100644 (file)
@@ -291,16 +291,7 @@ int arch_set_info_guest(struct vcpu *v, struct vcpu_guest_context *c)
        d->arch.cmdline      = c->cmdline;
        new_thread(v, regs->cr_iip, 0, 0);
 
-#ifdef CONFIG_IA64_SPLIT_CACHE
-    /* Sync d/i cache conservatively */
-    if (!running_on_sim) {
-        ret = ia64_pal_cache_flush(4, 0, &progress, NULL);
-        if ((ret!=PAL_STATUS_SUCCESS)&& (ret!=PAL_STATUS_UNIMPLEMENTED))
-            printk("PAL CACHE FLUSH failed for dom0.\n");
-        else
-            printk("Sync i/d cache for guest SUCC\n");
-    }
-#endif
+       sync_split_caches();
        v->vcpu_info->arch.evtchn_vector = c->vcpu.evtchn_vector;
        if ( c->vcpu.privregs && copy_from_user(v->arch.privregs,
                           c->vcpu.privregs, sizeof(mapped_regs_t))) {
@@ -959,16 +950,7 @@ int construct_dom0(struct domain *d,
 
        new_thread(v, pkern_entry, 0, 0);
        physdev_init_dom0(d);
-#ifdef CONFIG_IA64_SPLIT_CACHE
-    /* Sync d/i cache conservatively */
-    if (!running_on_sim) {
-        ret = ia64_pal_cache_flush(4, 0, &progress, NULL);
-        if ((ret!=PAL_STATUS_SUCCESS)&& (ret!=PAL_STATUS_UNIMPLEMENTED))
-            printk("PAL CACHE FLUSH failed for dom0.\n");
-        else
-            printk("Sync i/d cache for guest SUCC\n");
-    }
-#endif
+       sync_split_caches();
 
        // FIXME: Hack for keyboard input
 #ifdef CLONE_DOMAIN0
@@ -1027,16 +1009,7 @@ int construct_domU(struct domain *d,
 #endif
        new_thread(v, pkern_entry, 0, 0);
        printk("new_thread returns\n");
-#ifdef CONFIG_IA64_SPLIT_CACHE
-    /* Sync d/i cache conservatively */
-    if (!running_on_sim) {
-        ret = ia64_pal_cache_flush(4, 0, &progress, NULL);
-        if ((ret!=PAL_STATUS_SUCCESS)&& (ret!=PAL_STATUS_UNIMPLEMENTED))
-            printk("PAL CACHE FLUSH failed for dom0.\n");
-        else
-            printk("Sync i/d cache for guest SUCC\n");
-    }
-#endif
+       sync_split_caches();
        __set_bit(0x30, VCPU(v, delivery_mask));
 
        return 0;
@@ -1050,16 +1023,7 @@ void reconstruct_domU(struct vcpu *v)
                v->domain->domain_id);
        loaddomainelfimage(v->domain,v->domain->arch.image_start);
        new_thread(v, v->domain->arch.entry, 0, 0);
-#ifdef CONFIG_IA64_SPLIT_CACHE
-    /* Sync d/i cache conservatively */
-    if (!running_on_sim) {
-        ret = ia64_pal_cache_flush(4, 0, &progress, NULL);
-        if ((ret!=PAL_STATUS_SUCCESS)&& (ret!=PAL_STATUS_UNIMPLEMENTED))
-            printk("PAL CACHE FLUSH failed for dom0.\n");
-        else
-            printk("Sync i/d cache for guest SUCC\n");
-    }
-#endif
+       sync_split_caches();
 }
 #endif
 
index 099eec598718ce1da889d19229291998f6b3e208..be3cd7239d26c99a95b278e938ab7f6c16ef6cbe 100644 (file)
@@ -368,3 +368,23 @@ loop:
                goto loop;
        }
 }
+
+/* FIXME: for the forseeable future, all cpu's that enable VTi have split
+ *  caches and all cpu's that have split caches enable VTi.  This may
+ *  eventually be untrue though. */
+#define cpu_has_split_cache    vmx_enabled
+extern unsigned int vmx_enabled;
+
+void sync_split_caches(void)
+{
+       unsigned long ret, progress;
+
+       if (cpu_has_split_cache) {
+               /* Sync d/i cache conservatively */
+               ret = ia64_pal_cache_flush(4, 0, &progress, NULL);
+               if ((ret!=PAL_STATUS_SUCCESS)&& (ret!=PAL_STATUS_UNIMPLEMENTED))
+                       printk("PAL CACHE FLUSH failed\n");
+               else printk("Sync i/d cache for guest SUCC\n");
+       }
+       else printk("sync_split_caches ignored for CPU with no split cache\n");
+}